mechazoidal + vhdl   14

VHDL to PCB - Wishful Coding
Using yosys to simulate and synthesize from Verilog/VHDL: "This feeling is even more amazing than with software, and shows that as long as there are no compiler/library bugs or DRC errors, logic simulations are a good way to prove your PCB design."
vhdl  electronics  pmz 
12 weeks ago by mechazoidal
The Cx Programming Language
May have been quietly dropped by parent, but it's fully open-source under EPL
hardware  vhdl  programming  verilog  design 
june 2018 by mechazoidal
GitHub - enjoy-digital/litex: Build your hardware, easily!
"an alternative to MiSoC maintained and used by Enjoy-Digital to build
our cores, integrate them in complete SoC and load/flash them to the hardware
and experiment new features. (structure is kept close to MiSoC to ease
collaboration)"
fpga  verilog  vhdl  repo:github  electronics  python 
june 2018 by mechazoidal
GitHub - m-labs/migen: A Python toolbox for building complex digital hardware
"we have developed the Migen FHDL library that replaces the event-driven paradigm with the notions of combinatorial and synchronous statements, has arithmetic rules that make integers always behave like mathematical integers, and most importantly allows the design's logic to be constructed by a Python program. This last point enables hardware designers to take advantage of the richness of the Python language - object oriented programming, function parameters, generators, operator overloading, libraries, etc. - to build well organized, reusable and elegant designs. Other Migen libraries are built on FHDL and provide various tools such as a system-on-chip interconnect infrastructure, a dataflow programming system, a more traditional high-level synthesizer that compiles Python routines into state machines with datapaths, and a simulator that allows test benches to be written in Python."
fpga  verilog  vhdl  python  electronics 
june 2018 by mechazoidal
[J-core] VHDL by Example
Notes on learning VHDL, along with some high-level notes on how it's used in J-Core
jcore  vhdl  comment  electronics  pmz  archive_it 
november 2017 by mechazoidal
GTKWave
"a fully featured GTK+ based wave viewer for Unix, Win32, and Mac OSX which reads LXT, LXT2, VZT, FST, and GHW files as well as standard Verilog VCD/EVCD files and allows their viewing. "
electronics  engineering  vhdl  verilog  tools 
november 2017 by mechazoidal
GHDL Main/Home Page
"Combined with a GUI-based wave viewer and a good VHDL text editor, GHDL is a very powerful tool for writing, testing and simulating your VHDL code."
vhdl  fpga  electronics  simulator  engineering  software  tools 
november 2017 by mechazoidal
Apple2fpga: Reconstructing an Apple II+ on an FPGA
"As a Christmas present to myself in 2007, I implemented an 1980s-era Apple II+ in VHDL to run on an Altera DE2 FPGA board. The point, aside from entertainment, was to illustrate the power (or rather, low power) of modern FPGAs. Put another way, what made Steve Jobs his first million can now be a class project for my 4840 embedded systems class."
fpga  vhdl  retrocomputing  apple  hardware 
october 2017 by mechazoidal
Building a CPU from Scratch: jcore Design Walkthrough by Rob Landley & Jeff Dionne
from ELC2016, on using the SuperH arch for 'j2' as the patents have expired and it gets great code density. "Even though j-core uses an existing instruction set, the implementation is all new. This is a walkthrough of the j-core processor and SOC designs, aimed at software developers who would like to learn hardware development. It provides a basic introduction to VHDL, the GHDL simulator, and answers the question "how do I stick a 'printf' into my FPGA bitstream?""
fpga  programming  vhdl  hardware  video:youtube  presentation  jcore 
december 2016 by mechazoidal
nickg/nvc
"a GPLv3 VHDL compiler and simulator aiming for IEEE 1076-1993 compliance. NVC should not be considered a production quality tool and language support is lacking in many areas. However it has been successfully used to simulate several real-world designs."
vhdl  simulator  compilers  electronics  repo:github  programming 
december 2016 by mechazoidal
CλaSH
"a functional hardware description language that borrows both its syntax and semantics from the functional programming language Haskell." @robgssp: "It takes a more directly functional approach than Bluespec or Chisel, which I’m sure hardware folks will tend to dislike but suits me just fine."
Note that it can synthesize to Verilog, VHDL, or SystemC
haskell  verilog  embedded  programming  vhdl  hardware  fpga 
november 2016 by mechazoidal
In the "concurrent by default" section I would add the hardware description lang... | Hacker News
"Learning Verilog was an eye opening experience for me. It reminded me of the time I switched from unstructured BASIC to C when I was a kid. At first it seems complex and weird then suddenly it clicks and it all starts making sense."
2nd comment: "... and then suddenly you realize what a horrible, horrible language it is. I'm not exaggerating, it isn't even well-suited for the domain it is mainly used for (i.e., designing digital hardware circuits). [...] So basically, if one of you HNers want to try their hand at writing a new programming language, consider designing a modern Verilog instead of yet an other Javascript transpiler :)"
verilog  vhdl  post  programming  hardware  hn 
april 2014 by mechazoidal

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